During the production of microelectromechanical devices, e.g. thermogenerators or Peltier elements, layers are usually arranged (e.g. deposited, grown, etc.) on a substrate.
The published patent application DE 198 45 104 A1 describes, inter alia, a method for producing thermoelectric transducers, preferably produced by standard wafers appertaining to microelectronics, such as Si/SiO2. In this case, different components are produced from two substrate wafers, coated with the respective complementary n/p-type materials (sandwich design). Substrate wafers are standard wafers prepared, inter alia, in accordance with the teaching of DE 198 45 104 A1 for coating with thermoelectric material for device production.
On account of the differences in the thermal expansion coefficients between the thermoelectric material and the substrate of almost a decade, chipping or cracking must be reckoned with in the case of layers exhibiting little or poor adhesion and curvature of the substrate wafer must be reckoned with in the case of layers exhibiting very good adhesion.
It is equally known from the prior art that thermoelectric materials with high quality have been grown successfully on other substrates as well, such as mica, glass and BaF2 (see e.g.: Zou, H. et al., “Preparation and characterization of p-type Sb2Te3 and n-type Bi2Te3 thin films grown by coevaporation”, J. Vac. Sci. Technol. A (2001), Vol. 19, No. 3, pp. 899–903 and Boikov, Yu. A. et al, “Layer by layer growth of Bi2Te3 epitaxial thermoelectric heterostructures” Proc 16th International Conference on Thermoelectrics, Dresden, Germany, August 1997, pp. 89–2).
This prior art discloses that exclusively layers in the range of a few hundred nm to 1–3 μm were produced by the various thin-film methods mentioned therein. Larger layer thicknesses were not achieved, on the one hand owing to growth times that were too long for technical utilization and on the other owing to the expected problems on account of the different thermal expansion coefficients.
An exception is layers of IV-VI compounds, lead chalcogenides, on BaF2 (Harmann, T. C., et al.: “High thermoelectric figures of merit in PbTe Quantum Wells”, Electronic Mater., Vol. 25, No. 7 (1996), pp. 1121–1227). Layer thicknesses of more than 5 μm can be achieved here. This is because of the matched lattice constants of the materials and the likewise matched thermal expansion coefficients.
Although layer thicknesses of more than 5 μm are reported for V-VI compounds as well, nothing is said about substrates used or possible device technologies (see R. Venkatasubramanian et al.; “Thin-Film thermoelectric devices with high room-temperature figures of merit”, Nature, Vol 43, Oct. 11, 2001, 597–602).
The known technical solutions, stress-free growth of sufficient layer thicknesses of a few micrometers up to tens of μm is not possible with respect to all currently known substrates, in particular for utilization in thermoelectric components (e.g. Peltier elements and thermogenerators).
Stress-free is understood here to mean that the lateral mechanical stresses in a layer are intended to be as small as possible. Complete prevention of lateral mechanical stresses is technically virtually impossible to realize, but it is possible to realize a state in which the lateral stresses still present have no adverse effects.
Stress-free growth is furthermore necessary in order that the application of thermoelectric layers becomes readily accessible to the customary processes appertaining to microelectronics, in particular photolithographic processes and etching methods (in this respect, see DE 198 45 104 A1 and the article by H. Böttner et al.: “New Thermoelectric components in Micro-System-Technologies”. Proc. 6th Workshop European Thermoelectric Society (ETS), Freiburg, (2001)).
The disadvantages of the prior art are thus apparent: thin-film-thermoelectric components, in particular, are not accessible for customary technical utilization with the necessary layer thicknesses.